Hi all,
we're experiencing timing differences on the PCI bus with ICH7M chipsets relative to an older 852GM board, insights much appreciated:
Boards in question are Advantech's PCI-6886 and PCI-7030 (both are PCI slot-cards), specified with having above chipsets. Operating system is Linux kernel 3.8.8 . lspci shows:
00:1e.0 PCI bridge: Intel Corporation 82801 Mobile PCI Bridge (rev e2)
More details and kernel output is available, if needed.
Problem:
The application accesses one addres on a PCI I/O card bytewise (for bitbanging). The relevant driver C-code is rather simple: iowrite8(1, addr); iowrite8(0, addr);
All other parameters kept constant, this sequence generates a 0.7us pulse using the older chipset, but 1.2us with the ICH7M . Consequently, the bitbanging is too slow to the data in timebyte acc. The PCI I/O card is the same in both cases.
Question: Is there any way to configure something in the ICH7M chipset to get a faster single byte, non-burst access (read or write) on the PCI bus ?
TIA1e6
Peter